Overview

• ============================    Preliminary !    ====================================
  
• You must follow this website for the latest changes/updates
  
• Project groups are assigned by instructor
  
• Do not procrastinate, and do not underestimate the amount of time needed and complexity of the task
  
• As a rough guide, the 3-page midsemester project is a prelude to what is expected in final projects and final reports
• A well-written report/paper is EXPECTED
  
• STRONGLY RECOMMEND that you read IEEE authorship series: How to Write for Technical Periodicals & Conferences
• Final project main phases (see schedule below):
• A a 1-page proposal for faculty-sponsored projects and special topics
  
• Design review and 1-page report
• Final walk-through and 1-page report and rough demo
• Final reports (see details below) due on the week before final demonstration
  
• Final demonstration of circuit on last day of class
  
• Final powerpoint presentations due during final exam period (Approx. 15 slides, see below)
  

• Some technical notes:
  
• The FRDMK64F board uses the 100-pin MK64FN1M0VLL12 MCU, with
  
• The 100-pin package on the FRDMK64F has one DAC module, the 121-pin and 144-pin packages have two DAC modules.
• For more ADC information, see:
  
• Chapter 19 of Freescale KQRUG Kinetis Peripheral Module Quick Reference
• Freescale AN3827 Differences Between Controller Continuum ADC Modules
• Freescale AN4410 FlexTimer and ADC Synchronization for Field Oriented Control on Kinetis
• The Freescale  K64 Sub-Family Reference Manual, Rev. 2, January 2014
• Visit mbed-src  to see the details of AnalogIn.h and Ticker.h which reside in the mbed library
• Theory on digital capacitors and digital inductors
• Theory on stability of digital capacitors and digital inductors

Rough Schedule (TBD - keep checking for changes)

• Begin: today
• 11/8  Special projects: see topic0 below, 1-page proposals due for special topics
  
• Note: each group MUST propose a Java/NetBeans ethernet interface to control/display data or a different/unique hardware display/interface component (LCD text, graphic, USB, RJ45, bluetooth, etc).  So, coordinate with instructor and get your initial plans approved by email from instructor before purchasing hardware!!
• 11/10 Receive purchased parts (LCD, buttons, ADC, DAC, etc)
  
• 11/15 Design review: pass/fail, 1-page report showing:
  
• Use our previous 1-page project report format for the previous projects, including:
  
• Summary of technical performance goals/specs
  
• ADS simulation or Matlab simulation or Mathcad simulation of basic system functionality as appropriate
  
• NetBeans mock-up or block diagram of proposed  interface component with description of technical goals to allow control and display
• Note: each group MUST propose a different/unique NetBeans interface or hardware display/interface component (LCD text, graphic, USB, RJ45, bluetooth, etc).  So, coordinate with instructor and get your plans approved before purchasing hardware!!
  
• Demo your simulation and/or NetBeans mockup in the lab
• 11/22 Final walk-through: pass/fail, 1-page report and rough demo showing
  
• Use our previous 1-page project report format for the previous projects, including:
  
• This is your best chance for final feedback/changes ahead of final report
• Summary of technical performance goals/specs
  
• FINAL block diagram of  interface component with technical goals to allow control and display
• ADS simulation time domain triangle wave
  
• ADS frequency domain real and imag parts of Zin
• Preliminary demo your interface component and technical component in the lab
  
• 11/29 Final reports due
  
• By beginning of class period, you must:
  
1. You must email pdf  file
   
2. You must email LaTex source files zipped
   
3. You must bring hardcopies to class period
• Formatting:
  
• Length 4 page minimum, excluding references, along lines of mid-semester report, but add simulations and add interface design components
• Must have higher quality images,
  
• MUST be suitable quality for IEEE publication
• MUST be in LaTex, and LaTex must be emailed
• Must use IEEE LaTex template: template at http://www.ieee.org/conferences_events/conferences/publishing/templates.html
  
• 12/6 Final demonstrations of hardware in lab during class
• email pdf of any revised final report due
• email zip-file of mbed code due
• 12/13 Final powerpoint slides
  
• due by email by noon of final exam day
• minimum of 13 slides required:
  
1. Title, 
2. Overview,
   
3. Prior Art/references,  
   
4. Theory
5. K64F algorithm flowchart
   
6. System block diagram
7. Software code snippet of main computation loop
   
8. Photograph of prototypes
   
9. Theoretical results plotted (frequency response, Zin, etc)
10. Simulation results and Theoretical values plotted and compared
11. Measured results plotted and compared with theory
    
12. Table of design goals versus measured results and simulation results
13. Summary/Conclusion
    
• Also: any make-up presentations/materials will be due on 12/13
  
• email zip-file of any required revised reports, mbed code, etc
  
• Professional quality powerpoint is required
  
• Every member of team must present some 2 slides minimum
• Include: Tech goals, Block diagrams/photos planned, Theory, Simulation, Measured data, Software code snippet
  
• Approx. 15 slides and 15 minutes limit per group

Assignments

• Topics are assigned by the instructor
  
• Each group will be assigned a  topic

• NOTE: See new ADS archive for an example of ADS simulations

IN 2016 All Topics Have been Assigned

• Each topic includes 2 components:
• Component 1: A technical topic component with technical goals for DSP performance, such as a "-40 pF capacitor at 10 megasample/s"
• Component 2: An interface component with technical goals to provide both control and display of technical parameters, such as a button to increase capacitance and LCD readout or IoT/NetBeans readout
• Note: each group MUST propose a different/unique NetBeans interface or hardware display/interface component (LCD text, graphic, USB, RJ45, bluetooth, etc).  So, coordinate with instructor and get your plans approved before purchasing hardware!!
• Control may be by use of pushbuttons, sliders, webpages, laptop USB app, or cellphone apps (TTY not acceptable)
• Control must be sufficient to vary parameters as required
  
• Readout may be LCD text, LCD graphics, LED numeric, webpage, laptop USB app, or cellphone apps, etc. (blinky and TTY not acceptable)
• Readout must be reasonable, such as readout in nF, or ohms, or whatever
• Example: push a button and each time the resistance increases 50 ohm, cycling through 10 values, displayed on a 4-digit LCD
• Example: enter a resistance on a webpage or NetBeans, write through  RJ45 internet port, display values on webpage
• USB-TTY is not an adequate display/interface, you must use ethernet or new hardware for display
  
• For groups working on RC and RL and any similar projects
• Please note that the simulation results in ADS may give the FALSE impression that impedance measurements are easy.
• Do not underestimate the time required to measure the frequency domain response of impedance,
• … and do not underestimate the need for each group to review methods for measuring impedance using an oscilloscope at frequencies between 1 KHz and the Nyquist limit (half sample rate).   NOTE: network analyzers cannot measure your circuits, since these instruments do not measure below 30 KHz.
• Your plots should have at least 20 points showing real and imaginary parts of Z(s) from 1 KHz to 40 KHz.
  
•  It would be best for one member in each group to begin measurements of a simple known circuit such as 200 ohms in series with 10 nF in the lab, … so you are prepared to measure your embedded project later.  Measurement of this known circuit will ensure confidence in you chosen measurement technique (do not skip this).  
• Some example measurement methods:
• http://www.dejazzer.com/ece311/labs/lab3.pdf
• https://en.wikipedia.org/wiki/Lissajous_curve
• http://joel-therrien.wiki.uml.edu/file/view/Circuits+II+Lab+1.pdf
  

• Technical topics, specifications, and goals

• Topic0: Custom faculty-supported project
  
• The objective of the final project is to produce quality research and write a research paper ready for IEEE conference submission.  Therefore, other faculty-sponsored research projects using embedded signal processing can be considered, if a faculty follow-on paper submission is planned
  
• However, it is incumbent on the student to submit a 1-page project description before the specified deadline
  
• Generally, such a project should include:
• Technical component with specifications
• Interface component with description
• Note: each group MUST propose a different/unique interface hardware display/interface component (LCD text, graphic, USB, RJ45, bluetooth, etc).  So, coordinate with instructor and get your plans approved before purchasing hardware!!
• The 1-page description should follow the format for the "Topic1" below, including:
• Name of lead/sponsor faculty
  
• Names of all team members
• Block diagrams/photos planned
  
• Theory planned
  
• Simulation plans
  
• Measured data plan
• Software code snippet plan
• A primary reference paper such as my digital non-Foster paper at ISCAS2015
  

• Topic1: digital series RL
• Using the FRDM K64F board, design a digital series-RL (digital resistor in series with inductor) as described in the digital series RL theory writeup 
  
• Technical specifications: 
  
• Base specification: Sampling rate 80,000 sample/s (T=12.5 μs),  Rs = 50 Ω, Rser= -100, and L= -0.02 H (Rser is the series resistance)
• For comparison, also show time domain L di/dt ramp waveform for a 20 mH inductance, in addition to -20 mH
  
• Beware of dc current leading to infinite values: you will likely need to set some artificial ground point at some voltage
  
• Control interface:
  
• Vary L from -50 mH to 50 mH in steps of 5 mH or smaller
• Vary Rser from -250 to 250 ohms in steps of 50 or smaller
• Note: each group MUST propose a different/unique interface hardware display/interface component (LCD text, graphic, USB, RJ45, bluetooth, etc).  So, coordinate with instructor and get your plans approved before purchasing hardware!!
• For this project, you should read also the notes on latency included in the the digital series RL theory writeup, and adjust accordingly
• Required report contents:
• Block diagrams/photos: 1) a block diagram for digital non-Foster as in Fig. A1 of digital RL writeup, 2) simple block diagram of control interface scheme (buttons+ LCD +FRDM?), 3) photograph of complete system assembled
• Theory for: 1) difference equation, 2) H(z), 3) stability, and 4) impedance Z(s)
• Simulations showing: 1) time domain L di/dt as in Fig. A6b  of digital RL writeup,  2) frequency domain real and imaginary parts of Zin as in Fig. A7a of digital RL writeup,
  
• NOTE: See new ADS archive for your simulations
  
• Measured data showing: 1) time domain L di/dt as in A6a of digital RL writeup (but not a photo!),  2) micosoft excel frequency domain real and imaginary parts of Zin over specified frequency range as in Fig. A7a of digital RL writeup including dotted theoretical real and imaginary as example in Fig. A7b, 3) time domain L di/dt as in A6a, but for positive inductance
  
• Tabular data: use 5 columns: data-item, theoreticalValue, MeasuredValue, SimulatedValue, units.  In rows, place the following data-items: di/dt in A/s, peak voltage in mA, computed L from di/dt and peak voltage, Zin(s) at 1 KHz
• Software code snippet  showing difference equation for base specification

• Topic2: high-speed digital series RL
  
• Same as topic1, except:
• Must present formal 1-page proposal as for Topic0 above
• Demonstrate some observable negative inductance value at/above 1 megasample/s (possibly external ADC)
• Must see sawtooth ramp in time domain
  
• Interface component can be reduced/eliminated to compensate for increased difficulty
• Latency will become a large issue

• Topic3: floating RC
  
• Same as topic1, except:
• Floating RC instead of grounded RL
• Must present formal 1-page proposal as for Topic0 above
• Demonstrate a floating (not grounded) negative capacitance value at or above 80,000 samples/s
  
• Must see sawtooth ramp in time domain
  
• Interface component can be reduced/eliminated to compensate for increased difficulty

• Topic4: floating RL
  
• Same as topic3, except:
• Floating RL instead of floating RC

• See each topic above for minimum required data content for your reports and your demos
  

Report Formatting  TBD

• ============================    WARNING !!    ====================================
  
• **** WARNING **** YOU MUST ADHERE TO REQUIRED IEEE FORMAT Here:
• FORMAT TBD
  
• Format: 5 or 6 page along lines of 3-page mid-semester report, but add simulations and add interface design components
• Must have higher quality images
  
• MUST be suitable quality for IEEE publication
• The final report format is likely to be a 5-6 page version of the midsemester  3-page report template ( embDspMidtermProjTemplateSec.docx )  for this project (see instructor for password)
• FYI, here is a pdf version of 3-page template (see instructor for password)
• You MUST make full use of all required number of pages, empty space will be penalized
  
• A well-written report/paper is EXPECTED
  
• STRONGLY RECOMMEND that you read IEEE authorship series: How to Write for Technical Periodicals & Conferences
• Clearly describe everything, including:
• varibles in block diagrams
• variables in formulas
• units of variables KHz, pF, nH, m, s,
  
• all traces on oscilloscope plots
• pictures of display/interface or NetBeans
• For NetBeans A block diagram of whole system from laptop/netbeans through microrcontroller showing DSP block and ADC/DAC
  
• all curves on plots
• all results in any tables
  

• Project Demos
  
• Be prepared to demonstrate and discuss items such as:
• Demonstrate sine wave response
  
• Demonstrate triangle wave response
  
• Demonstrate triangle wave response for
  
• Change the sampling period and sampling rate
  
• Change C, L, R for a digital device
  
• Set breakpoints
• Start and stop the debugger
• Demonstrate a full clean/build
• Be prepared to answer questions such as:
  
• What is frequency response of the devices?
• What is z-transform of the difference equations?
• What port number is ADC (PT???)
• What port number is DAC(PT???)
• How can the value of the digital device be changed?
  
• What happens if the sample rate changes for the code?
• Which line of code sets up the interrupt/timer?
  
• How does myDsp() subroutine code get executed, if it is not called inside of main{}?
• What is an interrupt?
• Explain stability criteria.
• Where are stable poles in the z-plane?
• What is the starred transform?
  

Copyright  2015 T. Weldon

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